Junior RTL Design Engineer
Job position: Junior RTL Design Engineer, Bangalore, Karnataka
digital design, RTL & FPGA development flows. Proficiency in HDLs like SystemVerilog/Verilog for RTL Design. Knowledge... & experience of building IPs using AXI4, AXI4 Lite and AXI4 Stream Protocol. Basic understanding in Xilinx FPGA Architecture......
Job Location: Bangalore, Karnataka, IndiaSalary: unspecified
Company: Astrome Technologies
Job posted: 26 Sep 2024
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