Staff Engineer -Gate Level Verification (SystemVerilog, UVM, and GLS)
Job position: Staff Engineer -Gate Level Verification (SystemVerilog, UVM, and GLS), Hyderabad, Telangana
with Outpatient cover National Pension Scheme (NPS) Flexible work policy Childcare support We are an equal opportunity employer......
Job Location: Hyderabad, Telangana, IndiaSalary: unspecified
Company: Silicon Labs
Job posted: 19 Sep 2024
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