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Vhdl jobs in India

106 vhdl jobs found: showing 1 - 50

Functional Verification Engineer
Company: Accenture |

Location: Bangalore, Karnataka, India

| Salary: unspecified | Date posted: 01 Oct 2026
- Experience writing SystemVerilog/VHDL testbenches, sequences, and functional coverage models - Assertion-based verification (SVA
2027 Campus Hire_ Engineer_ Hw
Company: Qualcomm |

Location: Bangalore, Karnataka, India

| Salary: unspecified | Date posted: 30 Sep 2026
processors, communications/ networking ASICs. Verilog or VHDL, C/C++, Tcl/Perl/shell-scripting. RTL design experience
Fpga Development Engineer
Company: GE Vernova |

Location: Hyderabad, Telangana, India

| Salary: unspecified | Date posted: 30 Sep 2026
. · Significant experience of FPGA design using VHDL or Verilog. · Knowledge and experience of Model Based Design. · Strong
Modeling Design, Staff Engineer
Company: Lattice Semiconductor |

Location: India, India

| Salary: unspecified | Date posted: 29 Sep 2026
simulation tools such as Verilog, VHDL, SystemVerilog, or similar, to perform digital circuit analysis. Provide technical... modeling and simulation. Proficiency in using circuit simulation tools such as SPICE, Verilog, VHDL, System Verilog
Technical Lead - Design Verification
Company: Quest Global |

Location: Bangalore, Karnataka, India

| Salary: unspecified | Date posted: 29 Sep 2026
, CPU, ARM, Graphics (DDR, PCIE, USB) Should have worked on SOC Level / IP Level design using VHDL, Verilog coding RTL... Coding, CDC, Lint, Spyglass. Good in logic design. Expertise in Verilog and / or VHDL is desired. Strong in SV & OOPS IP
Senior Lead Engineer - Design Verification
Company: Quest Global |

Location: Bangalore, Karnataka, India

| Salary: unspecified | Date posted: 29 Sep 2026
, CPU, ARM, Graphics (DDR, PCIE, USB) Should have worked on SOC Level / IP Level design using VHDL, Verilog coding RTL... Coding, CDC, Lint, Spyglass. Good in logic design. Expertise in Verilog and / or VHDL is desired. Strong in SV & OOPS IP
Fpga Design Engineer (aerospace/defense, Bangalore, 4+ Yrs)
Company: Michael Page |

Location: Bangalore, Karnataka, India

| Salary: unspecified | Date posted: 28 Sep 2026
; Master's or PhD is advantageous. HDL: Strong VHDL and/or Verilog front-end design expertise. FPGA & verification tools
Design Verification Manager
Company: Texas Instruments |

Location: India, India

| Salary: unspecified | Date posted: 25 Sep 2026
Analytical, debugging skills with Verilog/VHDL designs. Good problem-solving skills. Experience with Cadence tools (Xcelium
Senior Engineer Dv
Company: Quest Global |

Location: Bangalore, Karnataka, India

| Salary: unspecified | Date posted: 24 Sep 2026
in hardware description languages (HDLs) such as Verilog, SystemVerilog, or VHDL Familiarity with scripting languages like Python
Lead Product Validation Engineer
Company: Cadence Design Systems |

Location: Noida, Uttar Pradesh, India

| Salary: unspecified | Date posted: 24 Sep 2026
and problem-solving skills Hands on experience VHDL Design. Scripting skills ( Python / Perl / Shell) EDUCATION: MS
Senior Lead Engineer - Fpga
Company: Raytheon Technologies |

Location: Yelahanka, Karnataka - Bangalore, Karnataka, India

| Salary: unspecified | Date posted: 24 Sep 2026
Requirements and develop FPGA Design Architecture Re-engineering and obsolescence management for FPGAs. Write VHDL RTL code... and Reviews Expert-level knowledge in VHDL, System Verilog, etc. Hands on experience in designing with MPSOC and/or RFSOC FPGAs
Lead Verification Engineer
Company: Cadence Design Systems |

Location: Noida, Uttar Pradesh, India

| Salary: unspecified | Date posted: 24 Sep 2026
, Electronics or Computer Science Engineer with very good understanding of HDLs (Verilog and/ or VHDL). Prior experience
Staff R&d Software Engineer – Rtl Restructuring & Transformation
Company: Synopsys |

Location: Noida, Uttar Pradesh, India

| Salary: unspecified | Date posted: 23 Sep 2026
understanding of data structures, graphs, and algorithms. Expertise in RTL design methodologies (Verilog, SystemVerilog, VHDL
Pd Leadership Role
Company: Advanced Micro Devices |

Location: Bangalore, Karnataka, India

| Salary: unspecified | Date posted: 23 Sep 2026
/Shell/Python scripting, and Verilog/VHDL RTL design and latest use of AI technologies Expert level understanding of EDA
Tech Lead / Specialist - Fpga
Company: AFRY |

Location: Pune, Maharashtra, India

| Salary: unspecified | Date posted: 23 Sep 2026
in VHDL, Verilog and/or System Verilog programming languages Experience of FPGA domain crossing designs Experience of FPGA
Verification Applications Engineer
Company: Synopsys |

Location: Hyderabad, Telangana, India

| Salary: unspecified | Date posted: 23 Sep 2026
or VHDL Working knowledge of SystemVerilog and dynamic simulation concepts, including testbench development and debug
Senior Design Verification Engineer
Company: Texas Instruments |

Location: Bangalore, Karnataka, India

| Salary: unspecified | Date posted: 23 Sep 2026
in EE/ECE/CS or related specializations -Excellent debugging skills with SystemVerilog/VHDL/VAMS designs
Asic Verification Eej 2026
Company: Bosch |

Location: Bangalore, Karnataka, India

| Salary: unspecified | Date posted: 22 Sep 2026
is a desirable but not must.Must have been a part of one or more ASIC/SoC tape outs.Knowledge of VHDL/VERILOG.SPECMAN knowledge
Fpga Design Engineer
Company: Right Advisors |

Location: Bangalore, Karnataka, India

| Salary: unspecified | Date posted: 22 Sep 2026
of experience in FPGA design and development role. Strong proficiency in VHDL, Verilog, and/or SystemVerilog. Hands
Asic Verification Eej 2026
Company: Bosch |

Location: Bangalore, Karnataka, India

| Salary: unspecified | Date posted: 22 Sep 2026
is a desirable but not must.Must have been a part of one or more ASIC/SoC tape outs.Knowledge of VHDL/VERILOG.SPECMAN knowledge
Asic Top Level Verification-hw Emulation
Company: Ericsson |

Location: Bangalore, Karnataka, India

| Salary: unspecified | Date posted: 21 Sep 2026
programming. Solid skills in RTL debugging issues in simulations of SystemVerilog or VHDL designs. Desired knowledge
Fpga Ip Design And Verification Engineer
Company: Altera |

Location: India, India

| Salary: unspecified | Date posted: 21 Sep 2026
. Familiarity with HDL languages (VHDL, Verilog, SystemVerilog). Experience or knowledge in scripting languages such as Tcl, Perl
Fpga Design Engineer
Company: Computer Task Group |

Location: India - Europe, India

| Salary: unspecified | Date posted: 20 Sep 2026
analysis, design reviews, and technical documentation. Skills: FPGA Design and Verification VHDL and/or Verilog Digital
Network Engineer - Aws & Cisco Migration Irc303755
Company: GlobalLogic |

Location: Bangalore, Karnataka, India

| Salary: unspecified | Date posted: 20 Sep 2026
densitometry systems. Basic embedded programming/firmware capability (C/C++) or FPGA/VHDL knowledge for design verification
High Performance Dsp Core Implementation(synthesis) Staff Engineer
Company: Qualcomm |

Location: Noida, Uttar Pradesh, India

| Salary: unspecified | Date posted: 20 Sep 2026
steps- Verilog/VHDL, Synthesis, QoR optimization & Equivalence Checking Familiarity with standard software engineering
High Performance Dsp Core Implementation(synthesis) Senior Lead Engineer
Company: Qualcomm |

Location: Noida, Uttar Pradesh, India

| Salary: unspecified | Date posted: 20 Sep 2026
steps- Verilog/VHDL, Synthesis, QoR optimization & Equivalence Checking Familiarity with standard software engineering
High Performance Dsp Core Implementation(synthesis) Senior Staff Engineer
Company: Qualcomm |

Location: Noida, Uttar Pradesh, India

| Salary: unspecified | Date posted: 19 Sep 2026
Proficient in VLSI front end design steps- Verilog/VHDL, Synthesis, QoR optimization & Equivalence Checking Familiarity
Applications Engineering, Sr Engineer
Company: Synopsys |

Location: Bangalore, Karnataka, India

| Salary: unspecified | Date posted: 19 Sep 2026
, and timing closure Strong working knowledge of Verilog, System Verilog, or VHDL, including the ability to read, debug
Applications Engineering, Sr Engineer
Company: Synopsys |

Location: Bangalore, Karnataka, India

| Salary: unspecified | Date posted: 19 Sep 2026
, and timing closure Strong working knowledge of Verilog, System Verilog, or VHDL, including the ability to read, debug
High Performance Dsp Core Implementation(synthesis) Engineer
Company: Qualcomm |

Location: Noida, Uttar Pradesh, India

| Salary: unspecified | Date posted: 19 Sep 2026
Compiler/Genus), Fair knowledge in LEC, LP signoff tools Proficient in VLSI front end design steps- Verilog/VHDL
Applications Engineering, Sr Engineer
Company: Synopsys |

Location: Bangalore, Karnataka, India

| Salary: unspecified | Date posted: 19 Sep 2026
, and timing closure Strong working knowledge of Verilog, System Verilog, or VHDL, including the ability to read, debug
Senior Design Lead
Company: HCLTech |

Location: India, India

| Salary: unspecified | Date posted: 19 Sep 2026
models constructed with simulation - Develop VHDL code to support FPGA-based designs; be proficient in simulating... specifications that document newly created designs and support product introduction. Test and verify hardware. Develop VHDL code
High Performance Dsp Core Implementation(synthesis) Senior Engineer
Company: Qualcomm |

Location: Noida, Uttar Pradesh, India

| Salary: unspecified | Date posted: 18 Sep 2026
Proficient in VLSI front end design steps- Verilog/VHDL, Synthesis, QoR optimization & Equivalence Checking Familiarity
Lead Product Engineer
Company: Cadence Design Systems |

Location: Bangalore, Karnataka, India

| Salary: unspecified | Date posted: 17 Sep 2026
. Experience requirement : - Good understanding of HDLs (Verilog, SystemVerilog and/ or VHDL) is MUST - RTL design and synthesis
Sr Engineer - Ait
Company: Larsen & Toubro |

Location: Powai, Maharashtra, India

| Salary: unspecified | Date posted: 17 Sep 2026
and platforms: Python, C/C++, LabVIEW, PLC & SCADA systems, MATLAB, VHDL, Vivado, Quartus, and WindRiver WorkBench 3.3. Skilled
Vlsi Design & System Architect/ Engineer
Company: Qualcomm |

Location: Chennai, Tamil Nadu, India

| Salary: unspecified | Date posted: 17 Sep 2026
Languages (Not Mandatory): C/C++, Python, Perl, SystemVerilog, VHDL, Verilog, SystemC - FPGA/ASIC design Exposure to HW/SW
Senior Low Power Applications Engineer
Company: Synopsys |

Location: Bangalore, Karnataka, India

| Salary: unspecified | Date posted: 17 Sep 2026
Shell for automation, debugging, and custom flow development Exceptional knowledge of Verilog, VHDL, SystemVerilog RTL
Automotive Functional Safety Staff Engineer - Digital Designware Ip
Company: Synopsys |

Location: Bangalore, Karnataka, India

| Salary: unspecified | Date posted: 16 Sep 2026
26262 ASIL levels, including ASIL D Experience with ISO 26262 Part 5, hardware description languages like Verilog or VHDL
Constraints Verification Applications Engineer
Company: Synopsys |

Location: Bangalore, Karnataka, India

| Salary: unspecified | Date posted: 16 Sep 2026
, or equivalent industry-standard constraint verification and signoff tools Strong command of VHDL, Verilog, and SystemVerilog RTL
Staff Verification Applications Engineer
Company: Synopsys |

Location: Hyderabad, Telangana, India

| Salary: unspecified | Date posted: 16 Sep 2026
design fundamentals, Verilog, VHDL, and UNIX/Linux environments Exposure to DPI, C/C++, SystemC, Functional Safety, or GenAI
Low Power Verification Applications Engineer
Company: Synopsys |

Location: Bangalore, Karnataka, India

| Salary: unspecified | Date posted: 16 Sep 2026
industry-standard LP signoff tools Strong command of VHDL, Verilog, and SystemVerilog RTL, and solid understanding of ASIC
Senior Engineer -performance Verification
Company: Ericsson |

Location: Bangalore, Karnataka, India

| Salary: unspecified | Date posted: 15 Sep 2026
programming. Solid skills in RTL debugging issues in simulations of SystemVerilog or VHDL designs. Desired knowledge
Gpu Ip Verification Engineer
Company: Intel |

Location: Bangalore, Karnataka, India

| Salary: unspecified | Date posted: 10 Sep 2026
-on training. - Proficiency in RTL Design using Verilog/VHDL and UVM concepts, including developing testbench sequences, drivers
R&d Ic Engineer 4
Company: Keysight Technologies |

Location: Gurgaon, Haryana, India

| Salary: unspecified | Date posted: 08 Sep 2026
requirements into RTL design and implementation. Develop and maintain RTL using Verilog and/or VHDL. Work with Intel/Altera... with RTL design using Verilog and/or VHDL. Good understanding of FPGA architecture, digital design, simulation, synthesis
R&d Ic Engineer 5
Company: Keysight Technologies |

Location: Gurgaon, Haryana, India

| Salary: unspecified | Date posted: 08 Sep 2026
production RTL in Verilog and/or VHDL. Work hands-on with Intel/Altera and/or AMD/Xilinx FPGA tools for synthesis... protocols. Strong experience with Verilog/VHDL and RTL design. Experience with Intel/Altera and/or AMD/Xilinx FPGA tools
Staff Engineer Cpu Ip Design Engineer
Company: GlobalFoundries |

Location: Bangalore, Karnataka, India

| Salary: unspecified | Date posted: 08 Sep 2026
of System Verilog, Verilog and/or VHDL Experience with simulators and waveform debugging tools. Knowledge of logic design
R&d Ic Engineer 5
Company: Keysight Technologies |

Location: Gurgaon, Haryana, India

| Salary: unspecified | Date posted: 08 Sep 2026
, and debug production RTL in Verilog and/or VHDL. Work hands-on with Intel/Altera and/or AMD/Xilinx FPGA tools for synthesis... protocols. Strong experience with Verilog/VHDL and RTL design. Experience with Intel/Altera and/or AMD/Xilinx FPGA tools
Architect, Electrical & Electronics
Company: Danaher |

Location: Bangalore, Karnataka, India

| Salary: unspecified | Date posted: 08 Sep 2026
-based embedded systems for motion control and/or data acquisition, including RTL development using Verilog or VHDL
Sr Staff Applications Engineer, Simulation & Debug
Company: Synopsys |

Location: Bangalore, Karnataka, India

| Salary: unspecified | Date posted: 07 Sep 2026
methodologies applied to real designs Strong command of HDL languages including Verilog, VHDL, and SystemVerilog, with solid
R&d Ic Engineer 4
Company: Keysight Technologies |

Location: Gurgaon, Haryana, India

| Salary: unspecified | Date posted: 07 Sep 2026
protocol and product requirements into RTL design and implementation. Develop and maintain RTL using Verilog and/or VHDL... hands-on experience with RTL design using Verilog and/or VHDL. Good understanding of FPGA architecture, digital design